The present invention relates to a method of mounting integrated circuit chips on a substrate, and to apparatus for carrying out this method.
In the well-known technique of producing integrated circuits, a wafer cut from a monocrystal of semiconductor material, such as silicon, is subjected to a series of operations consisting of doping, masking, photo-etching, and the ionic diffusion or implantation of doping impurities, thus forming within the wafer a plurality of identical regularly distributed integrated circuits. The wafer is then cut up into very small plates which are generally referred to as chips, each chip containing one complete set of integrated circuits. Each chip is provided with contact regions which are disposed in a predetermined configuration and which, by means of interface conductors soldered to them are intended to provide the electrical connections between each chip and an interconnecting base which is generally referred to as a substrate.
The chips are of very small dimensions and to make them less awkward to handle and easier to mount on a substrate, it has been proposed that they should be attached to a flexible support, such as a strip, made of an inextensible insulating material, the support being provided with openings to allow the chips to be mounted on it. Towards the centers of these openings extend overhanging interface conductors which are generally obtained by cutting away a conductive film which is formed on one of the faces of the supporting strip.
In each opening, the disposition of the free inner ends of the interface conductors matches that of the contact regions on a chip located in the center of the opening. This being the case, the chips are mounted on the support by positioning them under respective ones of the openings in the support in such a way that the contact regions on each chip line up with respective ones of the inner ends of the interface conductors in the opening concerned, and then soldering these ends to the said contact regions.
The chips which have been mounted on the strip in this way may then be attached to a substrate. To this end, the interface conductors, whose inner ends are soldered to the contact regions on a chip, are cut at a short distance from the edges of the chip. Having been separated from the support in this way, the inoperative face (i.e., the face opposite from the face provided with the contact regions) of the chip is then positioned against the substrate and the ends of the portions of the interface conductors which remain overhanging from the chip are soldered to correspond conductive areas on the substrate. The disposition of the conductive areas on the substrate corresponds to that of the ends of these remaining portions, such that the conductive areas which are used to attach any one chip to the substrate are arranged in a predetermined configuration, for example, in a square with sides 5 mm long. When the chip is positioned against the substrate, it is necessary for the ends of the remaining portions of the interface conductors to be situated exactly opposite the connecting areas to which they are to be soldered. This operation proves very difficult in that the interface conductors are generally very small and very close together.
To position a chip against the substrate, it is possible to use the method which is described in U.S. Pat. No. 3,869,787, which consists in applying a layer of liquid to a flat area on the substrate, this area being of the same dimensions as the inoperative face of the chip and the liquid being capable of wetting this area and the inoperative face but not the other faces of the chip, and then placing the face so wetted of the chip against the area on the substrate, the correct alignment of the chip being then brought about by surface tension forces in the liquid.
This method, which does not always operate satisfactorily, also makes it necessary for the substrate to be provided with appropriate areas, which areas need to be of the same dimensions as the chips which they are intended to receive. This condition is made all the more difficult to meet by the fact that, when the wafer of semiconductor material is cut up, it is virtually impossible to obtain chips of absolutely identical dimensions, with the result that the format of the chips is not always the same as that of the said areas and sometimes certain chips are not properly aligned. In addition, this method requires care in its application, and takes a relatively long time to carry out and is therefore expensive.